Referenced Items are not available for this document.
A high-input-sensitivity decision D flip-flop integrated circuit was designed and fabricated in a self-aligned InP double heterojunction bipolar transistor technology (Ft=180 GHz, Fmax=220 GHz). Circuit measurements at 40 Gbit/s show excellent eye quality, 15-mV sensitivity, and good clock phase margin. Two optical experiments, i.e., assessment of decision circuit reamplifying, reshaping, and retiming capabilities in 40-Gbit/s nonreturn-to-zero (full rate) photoreceiver and 43-Gbit/s optical signal noise ratio measurement (21.8 dB/0.1 nm for 10-9 BER) are also presented.
Published in:
Microwave Theory and Techniques, IEEE Transactions on
(Volume:53
,
Issue:
4
)
Date of Publication: April 2005
- Page(s):
- 1228 - 1234
- ISSN :
- 0018-9480
- INSPEC Accession Number:
- 8375542
- Digital Object Identifier :
- 10.1109/TMTT.2005.845712
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 18 April 2005
- Issue Date :
- April 2005
- Sponsored by :
- IEEE Microwave Theory and Techniques Society
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