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Power-efficient design of memory-based FFT processor with new addressing scheme

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3 Author(s)
Seungbeom Lee ; Syst. Integration Technol. Inst., Inf. & Commun. Univ., Daejeon, South Korea ; Duk-bai Kim ; Sin-Chong Park

The paper presents a new memory-addressing scheme for the realization of low power FFT processors. The scheme is based on the minimization of coefficient access and the reduction of switching activity by modifying the butterfly sequence. Therefore, power consumption in the complex multiplier and memory is significantly saved.

Published in:

Communications and Information Technology, 2004. ISCIT 2004. IEEE International Symposium on  (Volume:2 )

Date of Conference:

26-29 Oct. 2004