By Topic

MMIC yield optimisation by design centring and off-chip controllers [centring read as centering]

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
G. Scotti ; Dept. of Electron. Eng., Univ. of Rome 'La Sapienza', Roma, Italy ; P. Tommasino ; A. Trifiletti

The use of short-length III-V technologies is required to design circuits for microwave and millimetre-wave applications showing state-of-the-art performance. The parameter dispersion of such processes requires design techniques to achieve the best trade-off between performance and yield. External control of MMIC bias, based on process parameters estimation, allows yield enhancement even when design centering or feedback-based controls are not effective. A methodology to perform yield-oriented design of MMICs in III-V technologies is proposed. A set of on-chip circuits is used to estimate the value of process parameters; an external controller corrects the bias point in order to achieve the design centring in a parameter region around the estimated values. The proposed technique corrects circuit performance in the presence of parameter values belonging to the distribution tail, where standard techniques fail. The design centering approach and a distance-dependent correlated statistical model of HEMTs are used to design the external controller. The proposed methodology has been applied to design both a transimpedance amplifier and a distributed amplifier for multi-gigabit applications, showing a yield improvement of more than 10% with respect to the design centering approach, and encouraging the use of the proposed methodology for circuit design with short-length III-V technologies.

Published in:

IEE Proceedings - Circuits, Devices and Systems  (Volume:152 ,  Issue: 1 )