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The performance of a system using singular value decomposition (SVD) over a multiple-input multiple-output (MIMO) channel is dependent on the accuracy of the channel state information (CSI) at the transmitter and the receiver. In time division duplex (TDD) systems, the channel is reciprocal, hence the CSI can be retrieved through estimation of pilot symbols and applied to transmission. However, for a time-varying channel, the estimated CSI at the transmitter is incorrect due to an inherent delay between the estimation of the CSI and the transmission of data. A typical system employing SVD suffers degradation in capacity when incorrect CSI is used to transmit data. This paper proposes a new linear processing architecture, which reduces the effect of incorrect CSI at the transmitter. No additional pilot signals are required. It is shown at terminal velocity of 2 m.s-1 for the Hiperlan 2 standards, that the proposed architecture has a capacity of one bit lower than the theoretical channel capacity. At low velocities, this architecture outperforms (in terms of capacity) simpler systems that do not require CSI at the transmitter.