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The effect of silicon gate microstructure and gate oxide process on threshold voltage instabilities in p+-gate p-channel MOSFETs with fluorine incorporation

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6 Author(s)

Several phenomena have been identified which significantly reduce boron penetration for boron difluoride-implanted or boron/fluorine-co-implanted gates The fluorine-induced threshold-voltage (VTP) shift is minimized by using an as-deposited amorphous silicon gate and a gate oxide process that excludes hydrogen chloride. The VTP shift can be reduced to a level close to that of a boron-implanted gate, while maintaining the fluorine incorporation at the SiO2/Si interface to lower interface-state density. A model based on the fluorine atom distribution is proposed to explain the observed VTP shift

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Electron Devices, IEEE Transactions on  (Volume:39 ,  Issue: 7 )