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Instruction code mapping for performance increase and energy reduction in embedded computer systems

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2 Author(s)
S. Parameswaran ; Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW, Australia ; J. Henkel

In this paper, we present a novel and fast constructive technique that relocates the instruction code in such a manner into the main memory that the cache is utilized more efficiently. The technique is applied as a preprocessing step, i.e., before the code is executed. Our technique is applicable in embedded systems where the number and characteristics of tasks running on the system is known a priori. The technique does not impose any computational overhead to the system. As a result of applying our technique to a variety of real-world applications we observed through simulation a significant drop of cache misses. Furthermore, the energy consumption of the whole system (CPU, caches, buses, main memory) is reduced by up to 65%. These benefits could be achieved by a slightly increased main memory size of about 13% on average.

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:13 ,  Issue: 4 )