Passive hierarchical model order reduction and realization of RLCM circuits

This paper presents a novel compact passive modeling technique for high-performance RF passives and interconnects modeled as high-order RLCM circuits. The new method is based on a recently proposed general s-domain hierarchical modeling and analysis method. In this work, we first apply a state-space based optimization technique to enforce passivity on the hierarchical model order reduced admittance matrix. To realize the passivity-enforced admittance, we propose a general multiport network realization method based on relaxed one-port network synthesis technique based on Foster's canonical form. The resulting modeling algorithm leads to general SPICE-in and SPICE-out multi-port passive realization of any linear passive networks with easily controlled model accuracy and complexity. The experimental results on a number of PEEC modeled bus line circuits demonstrate the effectiveness of the proposed algorithm.