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Design of CMOS IO drivers with less sensitivity to process, voltage, and temperature variations

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2 Author(s)
Esch, G., Jr. ; ASIC Design Lab., Agilent Technol., Fort Collins, CO, USA ; Chen, T.

Matching I/O driver output resistance to transmission line impedance is critical for high speed I/O operation in source series termination environments. Tuning driver output resistance can be accomplished through the use of calibration circuitry. Under ideal conditions, calibration circuitry can properly calibrate an I/O driver. Operating in an environment with die process, voltage and temperature variations, that same calibration circuitry may perform improperly. This paper presents an I/O driver design that is less sensitive to process, voltage and temperature variations. The proposed driver design provides a near linear, or flat, output resistance response verses output voltageMatching I/O driver output resistance to transmission line impedance is critical for high speed I/O operation in source series termination environments. Tuning driver output resistance can be accomplished through the use of calibration circuitry. Under ideal conditions, calibration circuitry can properly calibrate an I/O driver. Operating in an environment with die process, voltage and temperature variations, that same calibration circuitry may perform improperly. This paper presents an I/O driver design that is less sensitive to process, voltage and temperature variations. The proposed driver design provides a near linear, or flat, output resistance response verses output voltage.

Published in:

Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on

Date of Conference:

28-30 Jan. 2004