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A linearizer architecture, based on predistortion and well suited for monolithic-microwave integrated-circuit (MMIC) implementation is presented in this paper. A mathematical model for the linearizer is described, which allows an optimum choice of the various design parameters (taking into account several constraints due to the specific implementation environment). The power amplifier to be linearized is described by nonlinear functions experimentally derivable from large signal S-parameters; the mathematical model is based on the complex power series expansion of these functions and on the definition of a suitable scaling rule illustrated in this paper. The overall linearizer model has been implemented in a system simulator (working with complex signals), also allowing the investigation of second-order distortion effects (not taken into account during the dimensioning of the structure). A preliminary prototype of the linearizer operating in the 12-16-GHz band has been implemented as a MMIC device (GaAs 0.25-μm technology); the measured performances have confirmed the promising potential of the novel architecture introduced.