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Deep pipelines vs. risk and power walls [microprocessors]

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Summary form only given. Intel's ×86 processors pushed pipelining and clock rates until physics stopped us. Less obviously, we were also pushing complexity, and therefore risk. We now know where the limits to these trends lie: with the Prescott processor. This talk explores the nature of risk in chip developments, how the ever-deepening pipelines in the Pentium series affected, and were affected by, perceived risk and thermals, and where the future will take us.

Published in:

Asynchronous Circuits and Systems, 2005. ASYNC 2005. Proceedings. 11th IEEE International Symposium on

Date of Conference:

14-16 March 2005