Referenced Items are not available for this document.
A built-in self-test (BIST) hardware insertion technique is addressed. Applying to register transfer level designs, this technique utilizes not only the circuit structure but also the module functionality in reducing test hardware overhead. Experimental results have shown up to 38% reduction in area overhead over other system level BIST techniques
Published in:
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Date of Conference: 14-16 Oct 1991
- Page(s):
- 282 - 285
- Meeting Date :
- 14 Oct 1991-16 Oct 1991
- Print ISBN:
- 0-8186-2270-9
- INSPEC Accession Number:
- 4127980
- Conference Location :
- Cambridge, MA
- Digital Object Identifier :
- 10.1109/ICCD.1991.139898
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
