By Topic

A data-driven architecture for distributed parallel processing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

9 Author(s)
Tamura, T. ; Mitsubishi Electr. Corp., Hyogo, Japan ; Komori, S. ; Asai, F. ; Tsubota, H.
more authors

A single-chip data-driven microprocessor with special functions for distributed parallel processing is described. The implemented functions necessary for parallel processing are: relative addressing mode for program memory; efficient test and set operation of arbitrary data in data memory; transparent access of distributed shared memory; and dynamic load distribution among multiprocessors. With this microprocessor, practical parallel processing systems which exploit a wide area of scientific applications can be constructed

Published in:

Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on

Date of Conference:

14-16 Oct 1991