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A compact tunable CMOS transconductor with high linearity

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4 Author(s)
Kachare, M. ; Klipsch Sch. of Electr. & Comput. Eng., New Mexico State Univ., Las Cruces, NM, USA ; Lopez-Martin, A.J. ; Ramirez-Angulo, J. ; Carvajal, R.G.

A novel CMOS linear transconductor is presented. The use of simple and accurate voltage buffers to drive two MOS transistors operating in the triode region leads to a highly linear voltage-to-current conversion. Transconductance gain can be continuously and precisely adjusted using dc level shifters. Measurement results of a balanced transconductor fabricated in a 0.5-μm CMOS technology show a total harmonic distortion of -54 dB at 100 kHz for an 80-μA peak-to-peak output, using a supply voltage of 2 V. It requires 0.07-mm2 of silicon (Si) area and features 0.96 mW of static power consumption.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:52 ,  Issue: 2 )

Date of Publication:

Feb. 2005

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