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A fast algorithm for T2 encoder in JPEG2000 suitable for hardware implementation is presented in this paper, based on the elaborate analysis of a rate-distortion optimization algorithm. By reducing calculative complexity, the difficulty of hardware implementation for the T2 encoder is reduced, and the parallelizability of the JPEG2000 hardware system is enhanced. The experimental results show that the final code stream is in accordance with the standard format of JPEG2000 and reconstructed image quality decreases little. The system has been implemented on FPGA
Published in:
Multimedia and Expo, 2004. ICME '04. 2004 IEEE International Conference on
(Volume:3
)
Date of Conference: 30-30 June 2004
- Page(s):
- 1527 - 1530 Vol.3
- Print ISBN:
- 0-7803-8603-5
- INSPEC Accession Number:
- 8304527
- Conference Location :
- Taipei
- Digital Object Identifier :
- 10.1109/ICME.2004.1394537
- Product Type:
- Conference Publications
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