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Additive bit-serial algorithm for discrete logarithm modulo 2k

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3 Author(s)
A. Fit-Florea ; Southern Methodist Univ., Dallas, TX, USA ; D. W. Matula ; M. A. Thornton

A novel algorithm for computing the discrete logarithm modulo 2k that is suitable for fast software or hardware implementation is described. The chosen preferred implementation is based on a linear-time multiplier-less method and has a critical path of less than k modulo 2k shift-and-add operations.

Published in:

Electronics Letters  (Volume:41 ,  Issue: 2 )