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Threshold voltage tuning and suppression of edge effects in narrow channel MOSFETs using surrounding buried side-gate

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2 Author(s)
Gokirmak, A. ; Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY ; Tiwari, S.

Scalable narrow channel silicon nMOSFETs, the threshold voltage of which can be tuned, are demonstrated. The devices use a buried polysilicon side-gate utilising silicon nitride (Si3N4 ) shallow trench isolation (STI). The side-gate of this device allows the tuning of the threshold voltage (Vt) in a range of approximately 1.5 V with a sensitivity of 0.75 V/V (deltaVt/deltaVside). The biased side-gate also suppresses the leakage currents along the silicon-STI interface below 50 fA. This may allow alternative STI materials for increased process and integration flexibility. Surrounding the buried side-gate structure allows very low-power CMOS with threshold tuning in a bulk structure

Published in:

Electronics Letters  (Volume:41 ,  Issue: 3 )