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This paper presents the design technique for a high speed sixth order bandpass continuous-time sigma-delta modulator in a standard 0.35μm CMOS technology. Three resonators are implemented in a parallel structure using highly linear operational transconductance amplifiers (OTA). Furthermore, an improved method employing two 3-bit flash converters as a loop quantizer allows doubling the sampling frequency. As a consequence we can design a modulator clocked at 1.2GHz allowing the integration of passive LC-filters in this standard technology. Transistor level simulations show that the modulator can achieve a signal-to-noise and distortion-ratio (SNDR) of 98dD over a 2MHz signal band at 300MHz central frequency.
Devices, Circuits and Systems, 2004. Proceedings of the Fifth IEEE International Caracas Conference on (Volume:1 )
Date of Conference: 3-5 Nov. 2004