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Pre-silicon prototyping of a unified hardware architecture for cryptographic manipulation detection codes

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4 Author(s)
Ganesh, T.S. ; Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; Sudarshan, T.S.B. ; Srinivasan, N.K. ; Jayapal, K.

Engineers developing complex embedded SoC designs are increasingly finding that traditional verification techniques are inadequate for delivering bug-free first pass silicon. The design community is turning to pre-silicon prototypes built from FPGA devices as a technique for meeting such challenges. We propose 'HashChip' and implement a strategy for its pre-silicon prototyping. The 'HashChip' is a hardware architecture aimed at providing a unified solution for three different cryptographic manipulation detection codes extensively used in the field of network security, namely, MD5, SHAI and RIPEMD160. Prototyping is attempted on a wide variety of FPGAs prior to ASIC implementation and the performance of the architecture is analyzed.

Published in:

Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on

Date of Conference:

6-8 Dec. 2004