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Maximizing system performance: using reconfigurability to monitor system communications

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2 Author(s)
Shannon, L. ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; Chow, P.

Commercial FPGA companies now provide tools that allow users to implement designs comprising soft-core processors and modules of dedicated logic. If a designer chooses to partition a system into multiple processors and hardware modules, tools and techniques for design analysis are necessary to understand system performance. This work introduces WOoDSTOCK, a tool that profiles system performance by adding monitors to the circuit running in real time on the chip. The user is able to generate a system specific profiler tailored to monitor the communication links between the different computing elements. This provides a macroscopic picture of system performance, which highlights the computing elements that cause bottlenecks in the design.

Published in:

Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on

Date of Conference:

6-8 Dec. 2004

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