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A 0.25-μm CMOS OPLL transmitter IC for GSM and DCS applications

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1 Author(s)
Peng-Un Su ; Syst.-on-a-Chip Technol. Center/Ind. Technol. Res. Inst., Hsin-Chu

A single-chip CMOS global system for mobile communications/digital cellular system dual-band offset phase-locked loop (OPLL) transmitter is presented in this paper. This chip includes a quadrature modulator and an OPLL modulation loop. Except for the loop filter and high-power voltage-controlled oscillator (TX VCO), everything is integrated into this chip to form a dual-band transmitter. This transmitter integrated circuit is fabricated in a 0.25-mum CMOS process. The current consumption without the TX VCO is approximately 23 mA under 2.7-V power supply for both bands. The measured rms and peak phase errors for Gaussian minimum shift-keying (GMSK) modulated signals are approximately 1deg and 2.4deg, respectively. The measurements show comparable performance to its BiCMOS counterparts

Published in:

Microwave Theory and Techniques, IEEE Transactions on  (Volume:53 ,  Issue: 2 )

Date of Publication:

Feb. 2005

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