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A fluxless flip-chip bonding for VCSEL arrays using silver-coated indium solder bumps

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5 Author(s)
Kun-Mo Chu ; Dept. of Mater. Sci. & Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Jung-Sub Lee ; Han Seo Cho ; Hyo-Hoon Park
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Alloys of lead-tin system are the most common solder alloys used today. However, there are environmental and health issues concerning the toxicity of lead present in these lead-tin solder alloys. Also, the flux residue removal is mandatory and leads to environmental threats. More importantly, the use of flux may contaminate the optically active surface by organic residue leftover, and a conventional cleaning method may not be effective for optoelectronic assemblies. Therefore, it is necessary to look for fluxless soldering processes for soldering optoelectronic systems. In the present study, we have conducted low-temperature flip-chip bonding of vertical-cavity surface-emitting laser (VCSEL) arrays on a glass substrate that provides propagation paths of laser beams and also supports a polymeric waveguide. Considering both the die shear test and the spreading test, the appropriate bonding temperature and pressure using indium solder bump were found to be about 150°C/500 gf. The fracture occured between the indium solder bump and the VCSEL chip pad during the die shear test. It is inferred that both the low bonding temperature and the oxide layer which is formed on the surface of the indium solder prevented the bump from interacting with the chip pad. We expect the thin silver layer coating on the indium bump to protect the inner indium solder from oxidation and to decrease the melting temperature of the indium solder. Thus, we try coating a thin silver layer onto the indium surface. An eutectic reaction occurs at 97 wt.% of In with an eutectic point of 144°C and the outer silver layer interacts with indium to form a AgIn2 compound layer due to the high interdiffusion coefficient. As a result, the thin silver layer coated on the solder bump is very effective to enhance the adhesion strength between the indium bump and the VCSEL chip pads by decreasing the melting temperature of the indium solder bump locally.

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Electronics Packaging Manufacturing, IEEE Transactions on  (Volume:27 ,  Issue: 4 )