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A novel high-speed sense amplifier for Bi-NOR flash memories

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3 Author(s)
Chiu-Chiao Chung ; Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan ; Hongchin Lin ; Yen-Tai Lin

A novel high-speed current-mode sense amplifier is proposed for Bi-NOR flash memory designs. Program and erasure of the Bi-NOR technologies employ bi-directional channel FN tunneling with localized shallow P-well structures to realize the high-reliability, high-speed, and low-power operation. The proposed sensing circuit with advanced cross-coupled structure by connecting the gates of clamping transistors to the cross-coupled nodes provides excellent immunity against mismatch compared with the other sense amplifiers. Furthermore, the sensing times for various current differences and bitline capacitances and resistances are all superior to the others. The agreement between simulation and measurement indicates the sensing speed reaches 2ns for the threshold voltage difference of lower than 1 V at 1.8-V supply voltage even with the high threshold voltage of the peripheral CMOS transistors up to 0.8 V.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:40 ,  Issue: 2 )

Date of Publication:

Feb. 2005

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