Cart (Loading....) | Create Account
Close category search window
 

MOSFET linearity performance degradation subject to drain and gate voltage stress

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chuanzhao Yu ; Electr. & Comput. Eng. Dept., Univ. of Central Florida, Orlando, FL, USA ; Jiann-Shiun Yuan ; Hong Yang

Device parameters degradation of nonlinear elements subject to drain and gate voltage stress is examined experimentally. Analysis of metal-oxide-semiconductor field-effect transistor linearity degradation due to stress is given. Effects on radio frequency (RF) circuit linearity are investigated systematically through a SpectreRF simulation based on measured device data.

Published in:

Device and Materials Reliability, IEEE Transactions on  (Volume:4 ,  Issue: 4 )

Date of Publication:

Dec. 2004

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.