By Topic

VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
F. Pecheux ; LIP6 Integrated Syst. Archit. Dept., Univ. Pierre et Marie Curie, Paris, France ; C. Lallement ; A. Vachoux

This paper focuses on commonalities and differences between the two mixed-signal hardware description languages, VHDL-AMS and Verilog-AMS, in the case of modeling heterogeneous or multidiscipline systems. The paper has two objectives. The first one is modeling the structure and the behavior of an airbag system using both the VHDL-AMS and the Verilog-AMS languages. Such a system encompasses several time abstractions (i.e., discrete-time and continuous-time), several disciplines, or energy domains (i.e., electrical, thermal, optical, mechanical, and chemical), and several continuous-time description formalisms (i.e., conservative-law and signal-flow descriptions). The second objective is to discuss the results of the proposed modeling process in terms of the descriptive capabilities of the VHDL-AMS and Verilog-AMS languages and of the generated simulation results. The tools used are the Advance-MS from Mentor Graphics for VHDL-AMS and the AMS Simulator from Cadence Design Systems for Verilog-AMS. This paper shows that both languages offer effective means to describe and simulate multidiscipline systems, though using different descriptive approaches. It also highlights current tool limitations, since full language definitions are not yet supported.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:24 ,  Issue: 2 )