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Test methodologies in the deep submicron era - analog, mixed-signal and RF

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4 Author(s)
A. Chatterjee ; Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; A. Keshavarzi ; A. Patra ; S. Mukhopadhyay

Summary form only given. The goal of this tutorial is to give the audience a detailed overview of testing challenges, proposed solutions and open problems. The tutorial starts with the introduction to testing challenges in the deep sub micron era. Issues with process variations and leakage and their impact on testing are discussed. This is followed by issues regarding fault modeling, DFT and BIST of analog and mixed signal circuits. It is shown how behavioral modeling could be utilized for such circuits in, conceptually, the same way that stuck-at fault modeling is used for digital testing. Issues and conceptual details regarding on-line testing are introduced, both in the contexts of digital as well as mixed signal circuits. The last part of the tutorial introduces in detail concept of built-in test (BIT) and built-off self-test (BOST) for high frequency RF circuits. A new paradigm for BIST of high-speed/RF circuits using alternate tests is also introduced.

Published in:

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design

Date of Conference:

3-7 Jan. 2005