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Extending IEEE 1588 to fault tolerant clock synchronization

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4 Author(s)
Gaderer, G. ; Inst. of Comput. Technol., Vienna Univ. of Technol., Austria ; Holler, R. ; Sauter, T. ; Muhr, H.

Clock synchronization over packet-oriented networks is an enabling technology for many distributed applications especially in automation. To this end it is of great interest to obtain a worst-case bound on the deviation between the clocks of any two nodes, known as clock precision. This article describes the steps involved in order to achieve a higher precision over Ethernet-based LANs without degrading fault tolerance and determinism aspects. We explain how the statistical time synchronization in IEEE 1588 could be extended by a deterministic algorithm to support those features in an orthogonal fashion.

Published in:

Factory Communication Systems, 2004. Proceedings. 2004 IEEE International Workshop on

Date of Conference:

22-24 Sept. 2004