By Topic

High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Isshiki, T. ; University of California, Santa Cruz ; Dai, W.W.

Field-programmable hardware exhibits a new trend towards computation-intensive applications. The basic idea is to completely customize the hardware architecture for the very given application in order to allocation the logic resources efficiently and effectively, improving the performance several orders of magnitude greater than general-purpose processor implementation. And at the same time, it still covers a wide variety of applications for their reconfigurability.

Published in:

Field-Programmable Gate Arrays, 1995. FPGA '95. Proceedings of the Third International ACM Symposium on

Date of Conference: