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Multi-Way System Partitioning into a Single Type or Multiple Types of FPGAs

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2 Author(s)
D. J. -H. Huang ; UCLA Computer Science Department, Los Angeles, CA ; A. B. Kahng

This paper considers the problem of partitioning a circuit into a collection of subcircuits, such that each subcircuit is feasible for some device from an FPGA library, and the total cost of devices is minimized. We propose a three-phase heuristic that uses ordering, clustering, and dynamic programming to achieve good solutions. Experimental comparisons are made with the previous methods of [Circuit Partitioning for Huge Logic Emulation Systems][Cost Minimization of Partitions into Multiple Devices].

Published in:

Field-Programmable Gate Arrays, 1995. FPGA '95. Proceedings of the Third International ACM Symposium on

Date of Conference:

1995