A Design Environment for Processor-Like Reconfigurable Hardware

There is a growing number of reconfigurable architectures that combine the advantages of a hardwired implementation (performance, power consumption) with the advantages of a software solution (flexibility, time to market). Today, there are devices on the market that can be dynamically reconfigured at run-time within one clock cycle. But the benefits of these architectures can only be utilized if applications can be mapped efficiently. In this paper we describe a design environment that takes into account the three aspects architecture, compiler, and applications, and we present the basic techniques that we use to realize the compiler.