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A new BIST scheme based on a summing-into-timing-signal principle with self calibration for the DAC

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3 Author(s)
Guan-Xun Chen ; Dept. of Electron. Eng., Nat. ChiaoTung Univ., Hsin Chu, Taiwan ; Chung-Len Lee ; Jwu-E Chen

In this paper, we propose a BIST scheme for the digital-to-analog converter (DAC). For the scheme, an analog summer is employed and the tested signal is transformed into a timing signal for a more precise measurement. Also, a calibration circuit is added to calibrate analog imperfection to increase accuracy of the BIST circuit. An 8-bit DAC BIST circuit is designed for demonstration.

Published in:

Test Symposium, 2004. 13th Asian

Date of Conference:

15-17 Nov. 2004