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Three-dimensional resist process simulator PEACE (photo and electron beam lithography analyzing computer engineering system)

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7 Author(s)
Hirai, Yoshihiko ; Matsushita Electr. Ind. Co. Ltd., Osaka, Japan ; Tomida, S. ; Ikeda, K. ; Sasago, M.
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A three-dimensional topographical simulator PEACE (photo and electron beam lithography analyzing computer engineering system) is discussed. One of the difficulties in resist topographical simulation exists due to the three-dimensional resist development algorithm. An algorithm based on the cell removal model provides accurate and stable results for the three-dimensional resist development process. The program has been adapted to a supercomputer for quick computation. The simulator can successfully perform the three-dimensional development in an absolutely stable manner, and good agreement can be obtained with experiments for both photo and electron beam lithography

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:10 ,  Issue: 6 )