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This paper describes a front-end processor for Blu-Ray Disc (BD) recorder applications. It integrates a partial response maximum likelihood (PRML) block, a data processor (DP) block, and a servo block. The PRML includes an analog-to-digital converter (ADC) and two digitally controlled oscillators (DCO) for data phase-locked loop (PLL) and wobble PLL. A nonlinear equalizer is designed to compensate for high-frequency signal components without increasing inter-symbol interference (ISI). A Teaklite DSP, an ADC, and a digital-to-analog converter are embedded for servo controls. The functions of 17PP modem and error correction code (ECC) are also implemented. Due to the proposed nonlinear equalizer in PRML, less than 2 × 10-4 of symbol-error rate (SER), defined in the Blu-Ray Disc format book, is achieved with tangential tilt margin of ±0.5°. This system on a chip (SOC) is fabricated in 0.18-μm one-poly five-metal CMOS technology. It contains 12 million transistors in a 50-mm2 die and consumes 0.9 W with a channel clock of 132 MHz in 2× playback mode.
Date of Publication: Jan. 2005