This paper describes techniques and approaches capable of achieving real-time motion-JPEG2000 encoding/decoding of high definition images with low power consumption. We propose a highly efficient VLSI implementation of procedure of two-dimensional wavelet transform that uses intermediate results through wavelet calculation. Double data-BUS and double encoder architecture with cross data flow is also introduced in order to make an improvement in coding performance and power consumption. The processor performs compression of 1440 × 1080 pixels images with the speed of 30 frames per second (fps) at a required operating frequency as low as 54 MHz. A test chip of this implementation has been fabricated in a 0.18-μm 5-layer CMOS process. The chip is 9.2 × 9.2 mm2 in size and consumes 0.9 W when supplied with 1.8 V and 54 MHz.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:40
,
Issue:
1
)
Date of Publication: Jan. 2005