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A 4-Mb toggle MRAM, built in 0.18-μm five level metal CMOS technology, uses a 1.55 μm2 bit cell with a single toggling magneto tunnel junction to achieve a chip size of 4.5 mm × 6.3 mm. The memory uses unidirectional programming currents controlled by locally mirrored write drivers to apply a robust toggle write sequence. An isolated read architecture driven by a balanced three input current mirror sense amplifier supports 25-ns cycle time asynchronous operation.
Date of Publication: Jan. 2005