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A 300-MHz 25-μA/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor

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8 Author(s)
Yamaoka, M. ; Syst. LSI Res. Dept., Hitachi Ltd., Tokyo, Japan ; Shinozaki, Y. ; Maeda, N. ; Shimazaki, Y.
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An on-chip 1-Mb SRAM suitable for embedding in the application processor used in mobile cellular phones was developed. This SRAM supports three operating modes - high-speed active mode, low-leakage low-speed active mode, and standby mode - and uses a subdivisional power-line control (SPC) scheme. The combination of three operating modes and the SPC scheme realizes low-power operation under actual usage conditions. It operates at 300 MHz, with leakage of 25 μA/Mb in standby mode, and 50 μA/Mb at the low-leakage active mode. This SRAM also uses a self-bias write scheme that decreases of minimum operating voltage by about 100 mV.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:40 ,  Issue: 1 )