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Low programming voltage floating gate analogue memory cells in standard VLSI CMOS technology

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2 Author(s)
Durfee, D.A. ; Brown Univ., Providence, RI, USA ; Shoucair, F.S.

Floating gate MOSFET structures were fabricated in a standard 2 mu m double-polysilicon CMOS process which requires programming voltages of only 6.5-9 V. This considerable reduction in programming voltage is achieved by simultaneously exploiting tunnelling through the interpolysilicon oxide and capacitive geometries whose top poly-layers overlap the edges of the lower poly-layers.

Published in:

Electronics Letters  (Volume:28 ,  Issue: 10 )