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Realisation of multiple-valued functions using the capacitive threshold logic gate

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2 Author(s)
Schmid, A. ; Microelectron. Syst. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland ; Leblebici, Y.

The circuit-level hardware realisation of several multiple-valued logic functions using the capacitive threshold logic design style is presented. The generic design approach for multiple-input, multiple-output and multiple-level transfer functions is shown. SPICE simulations of complex operators demonstrate correct operation which qualifies the proposed circuits for integration into larger multiple-valued logic systems. An analysis of noise margin figures and comparisons with previously published circuit examples are provided.

Published in:

Computers and Digital Techniques, IEE Proceedings -  (Volume:151 ,  Issue: 6 )