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Simulative analysis of the RapidIO embedded interconnect architecture for real-time, network-intensive applications

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5 Author(s)
Bueno, D. ; Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA ; Leko, A. ; Conger, C. ; Troxel, I.
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RapidIO is an emerging standard for switched interconnection of processors and boards in embedded systems. We use discrete-event simulation to evaluate and prototype RapidIO-based systems with respect to their performance in an environment targeted towards space-based radar applications. This application class makes an ideal test case for a RapidIO feasibility study due to high system throughput requirements and real-time processing constraints. Our results show that a baseline RapidIO system is well suited to space-based radar, providing significant improvements over typical bus-based architectures. Our results also show that extensions to the RapidIO protocol such as cut-through routing and transmitter-controlled flow-control would provide minimal performance improvements for the applications under study.

Published in:

Local Computer Networks, 2004. 29th Annual IEEE International Conference on

Date of Conference:

16-18 Nov. 2004