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In This work a new SH architecture of ISDN controller is proposed. The architecture of the proposed controller is based on a parallel reconfigurable processor. A main advantages of a proposed solution are highlighted. Data link and network level protocols are implemented in software for general purpose processors. Physical and data link levels implemented as standards. Physical level utilizes typical ICs. Other data link functions are based on parallel reconfigurable processor.
Date of Conference: 28-28 Feb. 2004