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Microstenciling: a generic technology for microscale patterning of vapor deposited materials

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4 Author(s)
M. Graff ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; S. K. Mohanty ; E. Moss ; A. B. Frazier

The fabrication of microstencils for patterning on unconventional substrates was demonstrated. Stencil feature sizes ranging from 6 to 370 μm with aspect ratios (stencil feature height :width) in the range of 0.5 : 1 to 15 : 1 were fabricated using ICP etching of silicon. The stenciling process was demonstrated for the deposition of metals (Ti/Au) and dielectrics (silicon dioxide) onto silicon, glass, and polymer based substrates for microfluidic system development. The results demonstrated some dependency of the deposition rate on the stencil feature size and aspect ratio. Results from adhesion studies showed excellent adhesion on all substrates with the exception of PMMA.

Published in:

Journal of Microelectromechanical Systems  (Volume:13 ,  Issue: 6 )