Close category search window
 

Design method for fully integrated CMOS RF LNA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Egels, M. ; UMR CNRS Polytech. Marseille, Marseille, France ; Gaubert, J. ; Pannier, P. ; Bourdel, S.

An efficient method for fully integrated RF CMOS LNA design is presented. A particular input matching topology enables inductor values to be selected in order to be integrated fully and to minimise the input losses. Moreover, an active device sizing method is used to achieve a 50 Ω input impedance with a low noise factor. Simulations show a 3.0 dB noise figure at 2.45 GHz for a power consumption of 10 mW in a 0.28 μm RF CMOS process.

Published in:
Electronics Letters  (Volume:40 ,  Issue: 24 )

Date of Publication: 25 Nov. 2004

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.