Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

Schottky-barrier source/drain MOSFETs on ultrathin SOI body with a tungsten metallic midgap gate

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Larrieu, Guilhem ; IEMN/ISEN UMR CNRS, Villeneuve d''Ascq, France ; Dubois, E.

This letter presents a simple low-temperature process to fabricate Schottky-barrier (SB) MOSFETs that integrates a midgap metallic gate (tungsten). The device architecture is based on a thin (10 nm) and lowly doped silicon-on-insulator film that provides a threshold voltage of -0.3 V independent on the depletion charge and therefore not sensitive to variations in film thickness and doping. A gate encapsulation technique using an SiO2-like hydrogen silsesquioxane capping layer features 15-nm-wide spacers and ensures the compatibility with the PtSi self-aligned silicide process. Long-channel devices present an ideal subthreshold swing of 60 mV/dec, over six decades of Ion/Ioff without any sign of sublinear upward bending of the IDS--VDS curves at low drain voltage.

Published in:

Electron Device Letters, IEEE  (Volume:25 ,  Issue: 12 )