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In this paper, a word-oriented built in self-repair (BISR) technique for SRAM bank is presented. All the repairs using BISR circuit are done during the reset period, and the process of referencing to the faulty line and its redundancy address are not required during the normal operation. The access time penalty is negligible and additional power consumption due to BISR circuit is kept minimum since it operates only during the reset time. Flexibility of this design technique allows to repair more numbers of faulty lines than conventional approaches with less area overhead.