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For the design of an embedded system, there is a variety of available processors, each one offering a different trade-off concerning factors such as performance and power consumption. High-level performance estimation of the embedded software implemented in a particular architecture is essential for a fast design space exploration, including the choice of the most appropriate processor. However, advanced architectures present many features, such as deep pipelines, branch prediction mechanisms and cache sizes, that have a non-linear impact on the execution time, which becomes hard to evaluate. In order to cope with this problem, this paper presents a neural network based approach for high-level performance estimation, which easily adapts to the non-linear behavior of the execution time in such advanced architectures. A method for automatic classification of applications is proposed, based on topological information extracted from the control flow graph of the application, enabling the utilization of domain-specific estimators and thus resulting in more accurate estimates. Practical experiments on a variety of benchmarks show estimation results with a mean error of 6.41% and a maximum error of 32%, which is more precise than previous work based on linear and non-linear approaches.