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A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35 μm CMOS technology

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3 Author(s)
F. P. H. de Miranda ; Escola Politecnica, Sao Paulo Univ., Brazil ; S. J. Navarro ; W. A. M. Van Noije

The design of a dual modulus prescaler 32/33 in a 0.35 μm CMOS technology is presented. The prescaler is a circuit employed in high frequency synthesizer designs. In the proposed circuit the technique called extended true single phase clock (E-TSPC), an extension of the true single phase clock (TSPC) technique, was applied. Additionally some new structures to double the data output rate are also employed. Simulations, based on the prescaler layout, were carried out and the results indicate that the circuit can reach up to 4 GHz with 4.38 mW of power consumption and power supply of 3.3 V.

Published in:

Integrated Circuits and Systems Design, 2004. SBCCI 2004. 17th Symposium on

Date of Conference:

7-11 Sept. 2004