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Power estimation and thermal budgeting methodology for FPGAs

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3 Author(s)
Lui, H.Y. ; Altera Corp., San Jose, CA, USA ; Lee, C.H. ; Patel, R.H.

The method used for power estimation and thermal budgeting on an FPGA product line, fabricated using 90 nm technology, is described in this paper. It addresses the reasons why state-of-the-art processes create power concerns on FPGAs, and describes methodologies that provide more relevant power and junction temperature estimations. Finally it suggests what can be done to improve the power budget and to balance the trade-offs between power and performance.

Published in:

Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004

Date of Conference:

3-6 Oct. 2004

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