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This letter presents a source-injection parallel coupled (SIPC) quadrature voltage-controlled oscillator (QVCO) topology. In the proposed SIPC-QVCO, compared to the conventional parallel-coupled LC-QVCO (P-QVCO), the coupling transistors are configured in a way so that the 1/f noise, contributed by the coupling transistors at the output, can be avoided. The newly proposed SIPC-QVCO and conventional P-QVCO are fabricated based on 0.25 μm CMOS technology. The phase noise of SIPC-QVCO measured at 1.5 GHz shows more than 10 dB improvement than that of the conventional P-QVCO over the offset frequency range of 10 k /spl sim/ 1 MHz while dissipating the same amount of power.