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Efficient scheduling method to reduce memory requirement for lifting-based 2D DWT circuit

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3 Author(s)
Kim, S. ; Dept. of Electron. & Inf. Eng., Hankuk Univ. of Foreign Studies, Yongin-Si, South Korea ; Lee, S. ; Cho, K.

An efficient method to schedule the operations involved in the lifting-based 2D DWT is presented. The emphasis is put on the reduction of on-chip memory requirement. The circuit based on the presented method requires a much smaller number of memory cells than other approaches.

Published in:

Electronics Letters  (Volume:40 ,  Issue: 22 )