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Nonlinear driver models for timing and noise analysis

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3 Author(s)
Tutuianu, B. ; Sun Microsystems Inc., Austin, TX, USA ; Baldick, R. ; Johnstone, M.S.

This paper presents a novel and flexible modeling technique to generate accurate linear and nonlinear driver models with applications in timing and noise analysis. The new technique, based on Galerkin's finite elements method, is very efficient because it relies on existing logic block characterization for timing, does not require additional nonlinear circuit simulations during modeling, and generates reusable models. The performance of the proposed modeling technique is exemplified in two different implementations: nonlinear driver models for delay noise analysis and piece-wise linear driver models for static-timing analysis.

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:23 ,  Issue: 11 )