By Topic

Nonlinear driver models for timing and noise analysis

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
B. Tutuianu ; Sun Microsystems Inc., Austin, TX, USA ; R. Baldick ; M. S. Johnstone

This paper presents a novel and flexible modeling technique to generate accurate linear and nonlinear driver models with applications in timing and noise analysis. The new technique, based on Galerkin's finite elements method, is very efficient because it relies on existing logic block characterization for timing, does not require additional nonlinear circuit simulations during modeling, and generates reusable models. The performance of the proposed modeling technique is exemplified in two different implementations: nonlinear driver models for delay noise analysis and piece-wise linear driver models for static-timing analysis.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:23 ,  Issue: 11 )