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Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling

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2 Author(s)
Youngjin Cho ; Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., South Korea ; Naehyuck Chang

Dynamic supply voltage scaling (DVS) is one of the best ways to reduce the energy consumption of a device when there is a super-linear relationship between energy and supply voltage, and a pseudo-linear relationship between delay and supply voltage. However, most DVS schemes scale the clock frequency of the supply-voltage-clock-scalable (SVCS) CPU only and do not address the energy consumption of the memory. The memory is generally non-supply-voltage-scalable (NSVS), but its energy consumption is variable to its clock frequency and the total execution time. Thus, DVS for an SVCS CPU cannot achieve an optimal system-wide energy saving without consideration of the memory, as far as it is controlled by an SVCS CPU. We introduce an energy-optimal frequency assignment, for both an SVCS CPU and a synchronous NSVS memory, which optimizes the system-wide energy consumption. We derive the energy-optimal clock frequencies for an SVCS CPU and a synchronous NSVS memory, as a function of the number of processor clock cycles, the number of memory accesses and the hardware energy model. Our technique modifies the frequency assignment of the CPU and the memory used in previous DVS schemes, which ignore the memory energy. It enables the system-wide energy-optimal settings and achieves additional 50% energy reduction over previous DVS schemes. This technique can also be applicable to synchronous NSVS peripheral devices.

Published in:

Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on

Date of Conference:

9-11 Aug. 2004